PDC4S:\CODING\GATE 2021 RavindraBabu Ravula\Digital Logic Design\5.Sequential Circuits |
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 9.D flipflop.mp4 | 60,878 KB | 12/12/2021 1:36 AM |
| 8.T flipflop.mp4 | 37,267 KB | 12/12/2021 1:36 AM |
| 7.JK flipflop.mp4 | 96,540 KB | 12/12/2021 1:36 AM |
| 6.edge triggered.m4v | 32,201 KB | 12/12/2021 1:36 AM |
| 51.Gate 2015 on sequence genetaion.mp4 | 38,510 KB | 12/12/2021 1:36 AM |
| 50.Gate 2015 on bit sequence.mp4 | 46,721 KB | 12/12/2021 1:36 AM |
| 5.positive level triggered.m4v | 40,862 KB | 12/12/2021 1:36 AM |
| 49.Gate 2015 on sequence generation.mp4 | 41,128 KB | 12/12/2021 1:36 AM |
| 48.Gate 2014 on counter.mp4 | 12,069 KB | 12/12/2021 1:36 AM |
| 47.Gate 2004 on SR-Latch.mp4 | 13,328 KB | 12/12/2021 1:36 AM |
| 46.Gate 2001 on counting Sequence.mp4 | 31,351 KB | 12/12/2021 1:36 AM |
| 45.Finding 2s complement.mp4 | 68,622 KB | 12/12/2021 1:36 AM |
| 44.Binary to gray convertor.mp4 | 34,951 KB | 12/12/2021 1:36 AM |
| 43.Example 2 on shift right register.mp4 | 23,999 KB | 12/12/2021 1:36 AM |
| 42.Example 1 on shift right register.mp4 | 35,220 KB | 12/12/2021 1:36 AM |
| 41.3 bit shift right register.mp4 | 53,032 KB | 12/12/2021 1:36 AM |
| 40.Applications of Flip flops.mp4 | 13,134 KB | 12/12/2021 1:36 AM |
| 4.clocked flipflops.m4v | 68,268 KB | 12/12/2021 1:36 AM |
| 39.model on analysis counting States and sequence generations.mp4 | 75,420 KB | 12/12/2021 1:36 AM |
| 38.Mod 8 random counter.mp4 | 41,206 KB | 12/12/2021 1:36 AM |
| 37.mod 4 down counter.mp4 | 12,694 KB | 12/12/2021 1:36 AM |
| 36.Mod 4 up Counter.mp4 | 26,372 KB | 12/12/2021 1:36 AM |
| 35.Mod 8 up counter.mp4 | 157,040 KB | 12/12/2021 1:36 AM |
| 34.introduction to asynchronous counters.mp4 | 23,464 KB | 12/12/2021 1:36 AM |
| 33.example on combinational circuits and FFs.mp4 | 49,794 KB | 12/12/2021 1:36 AM |
| 32.counter using 3 different FFs.mp4 | 79,163 KB | 12/12/2021 1:36 AM |
| 31.example on selfstarting and free running counters.mp4 | 33,393 KB | 12/12/2021 1:36 AM |
| 30.self starting and free running.mp4 | 77,370 KB | 12/12/2021 1:36 AM |
| 3.SR flipflop.m4v | 224,965 KB | 12/12/2021 1:36 AM |
| 29.Deriving the clock frequency.mp4 | 35,656 KB | 12/12/2021 1:36 AM |
| 28.counter using two different FFs.mp4 | 102,131 KB | 12/12/2021 1:36 AM |
| 27.mod 4 gray counter using 1 D and 1 T flipflop.mp4 | 24,038 KB | 12/12/2021 1:36 AM |
| 26.mod 4 gray counter using D FF.mp4 | 33,127 KB | 12/12/2021 1:36 AM |
| 25.mod 4 gray counter using T FF.mp4 | 114,797 KB | 12/12/2021 1:36 AM |
| 24.MoD 3 ring counters.mp4 | 84,436 KB | 12/12/2021 1:36 AM |
| 23.mod 6 Johnson counter.mp4 | 34,952 KB | 12/12/2021 1:36 AM |
| 22.mod 4 Johnson counter.mp4 | 27,762 KB | 12/12/2021 1:36 AM |
| 21.mod 2 ring counters.mp4 | 34,649 KB | 12/12/2021 1:36 AM |
| 20.shift counters.mp4 | 56,532 KB | 12/12/2021 1:36 AM |
| 2.latch and flipflop.m4v | 77,866 KB | 12/12/2021 1:36 AM |
| 19.asynchronous and synchronous counters.mp4 | 58,880 KB | 12/12/2021 1:36 AM |
| 18.introduction to counters.mp4 | 41,791 KB | 12/12/2021 1:36 AM |
| 17.inter conversion of flipflops example 5.mp4 | 12,233 KB | 12/12/2021 1:36 AM |
| 16.inter conversion of flipflops example 4.mp4 | 17,794 KB | 12/12/2021 1:36 AM |
| 15.inter conversion of flipflops example 3.mp4 | 66,329 KB | 12/12/2021 1:36 AM |
| 14.inter conversion of flipflops example 2.mp4 | 44,844 KB | 12/12/2021 1:36 AM |
| 13.inter conversion of flipflops example.mp4 | 54,753 KB | 12/12/2021 1:36 AM |
| 12.introduction to flipflop inter conversion.mp4 | 121,739 KB | 12/12/2021 1:36 AM |
| 11.example on flipflop 2.mp4 | 58,185 KB | 12/12/2021 1:36 AM |
| 10.example on flipflop.mp4 | 78,045 KB | 12/12/2021 1:36 AM |
| 1.Introduction to sequential circuits.m4v | 39,514 KB | 12/12/2021 1:36 AM |
